Gordon Moore's curve doubled transistors every two years and made silicon cheaper. Arthur Rock's curve doubled the cost of the factories that printed them, every four. The joke inside Intel's 1975 boardroom was that the second law would, eventually, kill the first.
From 2,300 transistors on the Intel 4004 in 1971 to roughly 134 billion on the Apple M3 Max in 2023. A doubling every two years across half a century — a feat the chip industry has performed roughly twenty-six consecutive times.
From around $4M in the early 1970s to Morris Chang's 2017 Bloomberg estimate of $20B for a 3nm facility. By 2026, Samsung's Pyeongtaek-3 and TSMC's Arizona Fab 21 phase 2 are budgeted near $25-30B apiece.
| Node | Year | Fab Capex | Avg. Design Cost |
|---|---|---|---|
| 130 nm | 2002 | $2.0 B | ~$15 M |
| 90 nm | 2004 | $2.5 B | ~$28 M |
| 65 nm | 2006 | $3.0 B | ~$32 M |
| 45 / 40 nm | 2008 | $3.5 B | ~$38 M |
| 28 nm | 2011 | $5.0 B | $40 M |
| 16 / 14 nm FinFET | 2014 | $8.0 B | $100 M |
| 7 nm (EUV insertion) | 2018 | $11 B | $217 M |
| 5 nm | 2020 | $15 B | $416 M |
| 3 nm | 2022 | $20 B | $590 M |
| 2 nm (GAAFET) | 2025 | $28 B | $725 M est. |
The consequence of two opposing slopes is selection. By 2020 the leading-edge logic club had narrowed to three: TSMC, Samsung, and Intel. GlobalFoundries quit 7nm in August 2018; UMC confirmed a year later that nodes below 14nm would not earn back their cost. In memory the same arithmetic left only Samsung, SK Hynix, and Micron. Each survivor is now too consequential to lose — the political problem the next chapter inherits.